Microchip Technology dsPIC33F Family Instrukcja Użytkownika Pobierz pdf (Strona 18)

dsPIC33F

5.0 EXCEPTION PROCESSING

The dsPIC33F has four processor exceptions (traps)

and up to 67 sources of interrupts, which must be

arbitrated based on a priority scheme.

The processor core is responsible for reading the

Interrupt Vector Table (IVT) and transferring the

address contained in the interrupt vector to the

program counter.

The Interrupt Vector Table (IVT) and Alternate Interrupt

Vector Table (AIVT) are placed near the beginning of

program memory (0x000004) for ease of debugging.

The interrupt controller hardware pre-processes the

interrupts before they are presented to the CPU.

The interrupts and traps are enabled, prioritized and

controlled using centralized Special Function Registers.

Each individual interrupt source has its own vector

address and can be individually enabled and prioritized

in user software. Each interrupt source also has its own

status flag. This independent control and monitoring of

the interrupt eliminates the need to poll various status

flags to determine the interrupt source

Table 5-1 contains information about the interrupt

vector.

Certain interrupts have specialized control bits for

features like edge or level triggered interrupts, interrupt-

on-change, etc. Control of these features remains within

the peripheral module, which generates the interrupt.

The special DISI instruction can be used to disable

the processing of interrupts of priorities 6 and lower for

a certain number of instruction cycles, during which

the DISI bit remains set.

TABLE 5-1: INTERRUPT VECTORS

Vector

Number

IVT Address AIVT Address Interrupt Source

8 0x000014 0x000114 INT0 – External Interrupt 0

9 0x000016 0x000116 IC1 – Input Compare 1

10 0x000018 0x000118 OC1 – Output Compare 1

11 0x00001A 0x00011A T1 – Timer1

12 0x00001C 0x00011C DMA0 – DMA Channel 0

13 0x00001E 0x00011E IC2 – Input Capture 2

14 0x000020 0x000120 OC2 – Output Compare 2

15 0x000022 0x000122 T2 – Timer2

16 0x000024 0x000124 T3 – Timer3

17 0x000026 0x000126 SPI1E – SPI1 Error

18 0x000028 0x000128 SPI1D – SPI1 Transfer Done

19 0x00002A 0x00012A U1RX – UART1 Receiver

20 0x00002C 0x00012C U1TX – UART1 Transmitter

21 0x00002E 0x00012E ADC1 – A/D Converter 1

22 0x000030 0x000130 DMA1 – DMA Channel 1

23 0x000032 0x000132 Reserved

24 0x000034 0x000134 I2C1D – I2C1 Transfer Done

25 0x000036 0x000136 I2C1E – I2C1 Bus Collision Error

26 0x000038 0x000138 Reserved

27 0x00003A 0x00013A Change Notification Interrupt

28 0x00003C 0x00013C INT1 – External Interrupt 1

29 0x00003E 0x00013E ADC2 – A/D Converter 2

30 0x000040 0x000140 IC7 – Input Capture 7

31 0x000042 0x000142 IC8 – Input Capture 8

32 0x000044 0x000144 DMA2 – DMA Channel 2

33 0x000046 0x000146 OC3 – Output Compare 3

34 0x000048 0x000148 OC4 – Output Compare 4

35 0x00004A 0x00014A T4 – Timer4

36 0x00004C 0x00014C T5 – Timer5

37 0x00004E 0x00014E INT2 – External Interrupt 2

38 0x000050 0x000150 U2RX – UART2 Receiver

39 0x000052 0x000152 U2TX – UART2 Transmitter

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 ... 89 90

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