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© 2008-2012 Microchip Technology Inc. DS70323E-page 43-81
Section 43. High-Speed PWM
High-Speed PWM
43
43.10.10 PWM Fault and Current-Limit Trigger Outputs to ADC
The CLSRC<4:0> bits (FCLCONx<14:10>) and FLTSRC<4:0> bits (FCLCONx<7:3>) and
control the fault selection to each PWM generator module. The control multiplexers select the
desired fault and current-limit signals for their respective modules. The selected fault and
current-limit signals which are also available to the ADC module as trigger signals, initiate ADC
sampling and conversion operations. The configuration of PWM fault, current-limit and
leading-edge blanking is shown in Example 43-23.
Example 43-23: PWM Fault, Current-Limit and Leading-Edge Blanking Configuration
/* PWM Fault, Current-Limit, and Leading-Edge Blanking Configuration */
//
FCLCON1bits.IFLTMOD = 0; /* CLDAT bits and FLTDAT bits control PWMxH/PWMxL pins on occurrence of
current limit and fault inputs respectively */
//FCLCON1bits.CLSRC = 0; /* Fault 1 is selected as source for the Current Limit Control signal */
//FCLCON1bits.FLTSRC = 3; /* Fault 4 is selected as source for the Fault Control Signal source */
//FCLCON1bits.CLPOL = 1; /* Current-limit source is active-low */
//FCLCON1bits.FLTPOL = 1; /* Fault Input source is active-low */
//FCLCON1bits.CLMOD = 1; /* Enable current-limit function */
//FCLCON1bits.FLTMOD = 1; /* Enable Cycle-by-Cycle Fault mode */
FCLCON1 = 0x031D;
IOCON1bits.FLTDAT = 0; /* PWMxH and PWMxL are driven inactive on occurrence of fault */
IOCON1bits.CLDAT = 0; /* PWMxH and PWMxL are driven inactive on occurrence of current-limit */
//LEBCON1bits.PHR = 1; /* Rising edge of PWMxH will trigger LEB counter */
//LEBCON1bits.PHF = 0; /* Falling edge of PWMxH is ignored by LEB counter */
//LEBCON1bits.PLR = 1; /* Rising edge of PWMxL will trigger LEB counter */
//LEBCON1bits.PLF = 0; /* Falling edge of PWMxL is ignored by LEB counter */
//LEBCON1bits.FLTLEBEN = 1; /* Enable fault LEB for selected source */
//LEBCON1bits.CLLEBEN = 1; /* Enable current-limit LEB for selected source */
//LEBCON1bits.LEB = 8; /* Blanking period of 8.32 ns */
LEBCON1 = 0xAC40;
PWMCON1bits.XPRES = 0; /* External pins do not affect PWM time base reset */
PWMCON1bits.FLTIEN = 1; /* Enable fault interrupt */
PWMCON1bits.CLIEN = 1; /* Enable current-limit interrupt */
Note: The code in Example 43-23 applies to devices with remappable I/O only.
- Section 43. High-Speed PWM 1
- 43.1 INTRODUCTION 2
- 43.2 FEATURES 2
- 43.4 ARCHITECTURE OVERVIEW 32
- OSC for Setting the ACLK 36
- 43.5.2 Time Base 38
- , Controls PWMxH only 44
- , Controls PWMxL only 44
- 43.6.3 Dead Time Generation 50
- 43.6.5 Dead Time Ranges 52
- 43.6.6 Dead Time Distortion 52
- 43.6.7 Dead Time Resolution 52
- 43.8 PWM INTERRUPTS 64
- 43.10 PWM FAULT PINS 70
- 43.10.2 Fault Interrupts 74
- 43.10.3 Fault Entry 74
- 43.10.4 Fault Exit 74
- 43.11 SPECIAL FEATURES 82
- 43.11.4 Chop Mode 84
- 43.11.5 PWM Pin Swapping 86
- 43.12 PWM OUTPUT PIN CONTROL 88
- 43.14 POWER-SAVING MODES 92
- 43.16.3 Multi-Phase PWM 96
- 43.16.4 Variable Phase PWM 98
- 43.21 REVISION HISTORY 110
- VCO)” in the first paragraph 112
- Revision D (March 2011) 114
- == ISO/TS16949 == 117
- Worldwide Sales and Service 118
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